In a NAND device, diffusion layers generally are formed on the surface of an Si (silicon) substrate in a contact region between select gates (SG) of NAND strings, so as to lower the contact resistance. In such a NAND device, STI (Shallow Trench Isolation) layers and AA (Active Area) layers are generally provided on the surface of the Si substrate, and the diffusion layers are formed on the surfaces of the AA layers.
However, when the diffusion layers formed on the surface of the Si substrate are annealed, strains are caused in the Si due to impurities doped in the Si substrate, so that the Si in the regions where the diffusion layers are formed is expanded. As a result, the crystalline structure of the Si is broken, so that crystal defects are formed in the Si.
The Si expansion induces a short-circuiting between adjacent NAND strings, and increases a junction leak. The increase of the junction leak causes problems such as a variation of the threshold voltage of the memory cells, deterioration of the memory cells, and degradation of the boost efficiency of unselected NAND strings. Therefore, in cases where the diffusion layers are formed on the surface of the Si substrate as described above, the Si expansion should be prevented.
JP-A 2006-60138 (KOKAI) discloses a NAND semiconductor memory device that includes a NAND string including cell transistors and select transistors, spacer layers formed on the side surfaces of the cell transistors and the select transistors, and insulators buried between the transistors forming the NAND string via the spacer layers. In JP-A 2006-60138 (KOKAI), silicon oxide layers are disclosed as an example of the spacer layers, and silicon nitride layers are disclosed as an example of the insulators.
JP-A 2008-91863 (KOKAI) discloses a method of manufacturing a semiconductor device, the method generating a compression stress by forming an etching mask with an amorphous carbon layer. According to JP-A 2008-91863 (KOKAI), the amorphous carbon layer is formed at a predetermined temperature, so that lifting phenomena of stack layers are suppressed.